Служба "ИНФОМАГ" предоставляет библиографическую и другую научную информацию, в первую очередь оглавления научных и технических журналов, а также зарубежных научных электронных бюллетеней. Имеется система поиска по ключевым словам.
В разделе "Информатика и электорника" представлены такие журналы, как "Микроэлектроника", "Автоматика и телемеханика", "Нейрокомпьютеры: разработка и применение", "Радио", "Открытые системы", "Компьютер пресс" и др.
Программа для дистанционного обучения по курсу "Технология СБИС". Имеется система самоконтроля.
Составитель: доцент КОФ ПетрГУ Назаров А.И.
В справочнике в табличной форме представлены основные параметры полевых транзисторов, а также типовые области их применения.
Составитель: Козак В.Р.
Описывается принцип действия транзистора в качестве усилителя.
Simulation of logic designs is a very important part of the VLSI-design process. The increasing size of the designs requires more efficient simulation strategies to accelerate the simulation process. Parallel logic simulation seems to be a promising approach in this direction.
This paper describes the basic principles of parallel logic simulation, discusses different approaches, and surveys the research done in this field so far.
Author: Gerd Meister, 1993.
Professor of Electrical and Compute Engineering Ibrahim N. Hajj's Homepage. Research Interests: Computer-Aided Design of VLSI Circuits and Systems, VLSI Design for Reliability, VLSI Design for Low Power, Mixed-Mode Simulation, Fault Simulation and Testing.
Publications, research, students, links.
Presents a caching method that significantly reduces the cost of subnetwork evaluation during switch-level simulation. The method speeds up switch-level simulation by as much as a factor of two while encurring a reasonable space penalty that is linearly related to the netlist size.
Author: Larry G. Jones, University of Illinois at Urbana-Champaign, 1991.
Circuit simulation is a significant bottleneck in the design of VLSI circuits and parallel execution offers the potential for considerably reducing the simulation time for large circuits.
This paper presents MIRSIM, a parallel switch-level circuit simulator. This is a Maisie implementation of IRSIM, an existing event-driven simulator that incorporates a linear model of MOS transistors. The implementation has been used to simulate a number of circuits using both conservative and optimistic protocols on the IBM SP2 using a variety of circuit partitioning techniques.
Authors: Yu-an Chen and Rajive Bagrodia, 1995.
This paper presents a new dynamic power estimation method that produces accurate power measures at considerably faster run times. The approach uses an enhanced switch-level simulation algorithm that takes into account both short-circuit power and charge-sharing power effects.
Authors: S. Gavrilov, A. Glebov, S. Rusakov Russian Academy of Sciences, Moscow, 1995.
The VLSI Technology Symposium was organized in 1981 by professors Shoji Tanaka and Walter Kosonocky and it has alternated each year between sites in US and Japan. The presentation of high-quality papers has made it possible for attendees to learn about new directions in the development of VLSI technology.