Design of Finite State Machines

with Transformation of the Object’s Codes

 

Barkalov A.A., Institute of Informatics and Electronics. Zielenogorski University,  POLAND, Lavrik A.S., master degree student, DonNTU, Donetsk, Ukraine

 

 

Introduction

A control unit (CU) of any digital system can be represented as Mealy or Moore finite state machine (FSM). The minimization of hardware in the circuits of control units (CU) implemented on the Programmable Logic Devices (PLD) can be worked out thanks to the increasing of the number of levels in the circuit of FSM [1]. In this case optimization of the circuit that implements the microoperations of the digital  system is connected with formation of some additional variables [2, 3]. The method that permits to decrease the amount of additional variables and, therefore, an amount of PLDs in the circuit of FSM is proposed in this article.

 

 

The main definitions and an idea of the optimization's method

Let a control unit is represented as finite state machine S with set of  internal states , set of  logic conditions , set of microoperations  and terms  and let each term corresponds to one line of the direct structural table (DST ) [1]. Let DST has Z different sets of microoperations  and let states  are encoded using special set of  internal variables , where R = ]log2M[. Let each set Yz corresponds to the binary code K(Yz) with Q = ]log2Z[ bits and let these encoding variables form set . The states correspond to the binary codes K(am) with  R bits. Let’s name state  and set  as the objects of FSM S. The main idea of the proposed method is following.

One of the objects (state or set of microoperations) is a function on the terms of DST and second object is the function of the first one and - may be- some additional elements. Such approach is based on the insertion of special code transformer (CT) in the structure of FSM.  If code transformer CT  implements the matching, then we’ll name such FSM as PCAY – FSM. If code transformer CT implements the matching, then we’ll name such FSM as PCYY – FSM. The figures 1 and 2 show the structures of  PCAY- FSM and PCYY – FSM that are the Moore FSM. Here  W is the set of variables that are necessary for one-to-one identification of the objects [4].

 

Figure  1 – The structural circuit of  Moore PCAY- FSM

Figure  2 – The structural circuit of  Moore PCYY-FSM

Because of the independence of the output functions of Moore FSM from the logic conditions, the subcircuit Y implementing the system of output functions Y can be connected with the outputs of register  RG whether  directly (PCYY – FSM) or through the circuit CT (PCAY – FSM). Here subcircuit  P  forms the excitation functions   and special functions  that are needed to form in the RG whether the functions T(PCAY – FSM) or the functions  V and W (PCYY – FSM). PCAY – FSM does not form functions Y because of relation

 

             .                                                    (1)

 

Condition (1) is true only for particular case of Mealy FSM. It is the reason to form the functions W in  Mealy PCAY- FSM (Fig.3) and PCYY – FSM (Fig.4).

Figure  3 –  The structural circuit of Mealy  PCAY-FSM

 

Figure  4 – The structural circuit of  Mealy  PCYY-FSM

 

If codes of the objects are form by subcircuit P such objects are named as primary objects. If codes of the objects are the functions from other objects they are named as the secondary objects.

 

 

Common method of design of automata with transformation of objects

The method of design for any automaton includes the same steps:

1. Formation of the direct structural table of FSM. In this case an initial information about a control algorithm is represented as a flow-chart marked by the states of the corresponding FSM.

2. Determination of the set of variables I to the one-by-one identification of the secondary objects by primary ones [4].

The amount of the variables in the set I should be minimal one to decrease the total amount of the required outputs of the  subcircuit P.           

3. Encoding of the sets of microoperationsusing the elements of the set V. Formation of  table of microoperations. This step is executed for further design of the transformed DST. The amount of variables in the set V should be minimal to minimize the amount of outputs in the subcircuit  P.

4. Encoding of the variables  using the elements of the set, where  P = ]log2K[. Such approach permits to minimize the total amount of outputs in the subcircuit P and the amount of the inputs in the code transformer.

5. One-to-one identification of the secondary objects by the codes of prime objects and codes  K(IK) of variables .

6. Formation of the transformed DST by excluding of the column of secondary objects and insertion of the column of variables for identification.

7. Formation of the system of functions implemented by subcircuit P using the transformed DSP.

8. Formation of the table of code converter and the system of its functions.

9. Design of the logical circuit of FSM in the given base.

 

The examples of application of this procedure with details for design of particular structure of FSM can be found in literature [4,5].

 

 

Table 1- Initial DST of Moore FSM

am

K(am)

as

K(as)

Xh

Фh

h

a1

(¾)

000

a2

001

x1

D3

1

a3

010

 x2

D2

2

a4

011

D2 D3

3

a2

(y1,y2)

001

a5

100

x3

D1

4

a6

101

D1 D3

5

a3

(y3)

010

a5

100

x3

D1

6

a6

101

D1 D3

7

a4

(y1,y2)

011

a5

100

x3

D1

8

a6

101

D1 D3

9

a5

(y3,y4)

100

a7

110

x4

D1 D2

10

a1

000

-

11

a6

(y1,y2)

101

a7

110

x4

D1 D2

12

a1

000

-

13

a7

(y3,y4)

110

a5

100

x3

D1

14

a6

101

D1 D3

15

 

Let us discuss an example of Moore FSM design using Table 1. This table contains  Т=4 sets of microoperations: Y1=Æ, Y2={y1,y2}, Y3={y3}, Y4={y3,y4}, and  Q=2 variables is sufficient to encode them so  Z={z1, z2}.Let К(Y1)=00, K(Y2)=01, …, K(Y4)=11. Then tables of microoperations and code transformer are given in the tables 2 and 3 respectively.

Functional circuit of FSM is shown on the figure 5. The application of this method is profitable if

         R > Q.                                                      (2)

 

Table  2 - Table of microoperations of Moore FSM

Yt

K(Yt)

y1

y2

y3

y4

t

Y1

00

0

0

0

0

1

Y2

01

1

1

0

0

2

Y3

10

0

0

1

0

3

Y4

11

0

0

1

1

4

 

 

Table  3 - Table of the code transformer of Moore FSM

am

K(am)

Yt

K(Yt)

Zm

m

a1

000

Y1

00

-

1

a2

001

Y2

01

z2

2

a3

010

Y3

10

z1

3

a4

011

Y2

01

z2

4

a5

100

Y4

11

z1 z2

5

a6

101

Y2

01

z2

6

a7

110

Y4

11

z1 z2

7

 

 

 

References

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2.       Скляров В.А. Синтез автоматов на матричных БИС – Минск: Наука и техника, 1984. – 287 с.

3.       Соловьёв В.В Проектирование цифровых систем на основе программируемых логических интегральных схем. – М.: Горячая линия – Телеком, 2001. – 636 с.

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5.       Баркалов А.А., Палагин А.В. Синтез микропрограммных устройств управления.– Киев: ИК НАН Украины, 1997. – 135 с.

    6. Баркалов А.А. Принцип оптимизации логической схемы микро-программного автомата Мура // Кибернетика и системный анализ. – 1998. - №1. – C. 65-72.

    7. Баркалов А.А., Зеленева И.Я. Оптимизация логической схемы устройства управления с заменой переменных // Управляющие системы и машины. – 2001. - №1.– C.75-78.