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I was born on 11-th of March in 1981.
My parents are - Gez Valery Anatolyevich and Gez Galina Gennadievna.
I've been studying in general school ¹13. I was diligent at studying and loved almost all disciplines, except humanitarian ones and that which requires to cram a lot. Most of all I loved sport related lessons because I was released of them. However, closer to graduation I had only one passion - computers. Unfortunately, school program schedule do not pay enough attention to computers so I've been studying computers and digital electronics by myself instead of attending annoying lessons at school.
Time spent in front of monitor and a heap of digital boards wrapped in wires (named "Spectrum") was not muddled away - it helped me to enter "Computer engineering" specialty in Donetsk National Technical University (in 1998) and on initial stage of training.
Training in the university was full of impressions and pleasing surprises. Have no doubts, knowledge of dozens of binary multiplying and dividing algorithms will be very useful during my further work and life. Such disciplines as philosophy, economics and "culturelogics" making me a really valuable IT-specialist. Great scholarship was a good reason to give up smoking forever.
During fourth year of studying I became interested in HDL - Hardware Description Languages. These languages become valuable because of existence of automatic design tools, which allow simulating devices described by means of HDL and synthesizing these devices by means of FPGA technology - Field Programmable Gate Arrays. This makes design process much faster comparing with classical approaches of digital device development.
Thanking to knowledge of VHDL language I've successfully participated in Ukrainian testing performed by American company ALDEC (www.aldec.com). Good testing results gave me an opportunity of internship in two branches of the ALDEC Company in Poland (Gliwice and Krakow cities). During training I've picked up an interesting subject for my master thesis - simulating HDL projects on a multiprocessor systems. From university side head of my master thesis is one of the best specialists at HDL - Zinchenko Yuri Evgenyevich. From ALDEC side head of master thesis is president of ALDEC - Stanley Hyduke.
In further life I see myself working as a programmer in a field of design tools or computer graphics.
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