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My photo TERESCHUK
Dmitriy
Sergeevich

gr. SM-96b
e-mail: DmitryTereschuk@fuib.com

The theme of my masters thesis: "Development of methods and algorithms of system of multiple-valued parallel logic simulation and construction of the tests for MOS VLSI".

Masters thesis  |  Electronic library  |  Annotated references  |  Internet resources


The creative biography

I was born on December 27, 1978 in Lugansk city. From 1986 I live in Donetsk.
Since 1986 for 1996 I studied at the comprehensive school ¹ 70 in Donetsk. At school since the 7-th class I profound studied mathematics.
In 1996 by results of rating Olympiad on mathematics I entered Donetsk State Technical University (DSTU), faculty of computer facilities and computer science (CF&CS), chair of applied mathematics and computer science (AM&CS), speciality "Software maintenance of computer facilities and automated control systems". Such my choice is explained to that the profession of the programmer, in my opinion, is one of the most interesting and perspective for today, and DSTU is one of the best technical high schools of Ukraine.
In 2000 I passed State examinations and acquired bachelor's degree in computer science. This year I continue studying at magistracy in DSTU.

I skilled at such computer languages as C, C ++, Perl, Pascal, Prolog, Lisp. Win32 is my main developing platform. For development most of my applications I use Microsoft Visual C ++ 6.0.
I well known with HTML, JavaScript, VRML. I master basis of COM / ActiveX technology (and its using throw MFC libraries). I am familiar with such tool kits as OpenGL, Direct3D, DirectDraw libraries.
At the study process I develop such term paper:

My master's thesis is attitude to research and development of methods and algorithms of system of multiple-valued parallel logic modeling and construction of the tests for MOS VLSI. This theme was offered to me by my scientific instructor - Ph.D. Andrukhin Alexander Ivanovich. I have taken a great interest in this themes since I was realized the algorithms of switch-level modeling of the serviceable MOS circuits on the fourth rate under a guidance of Andrukhin A. I.


Masters thesis  |  Electronic library  |  Annotated references  |  Internet resources


© Tereschuk D.S., 2001