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DonNTU Master Vladimir Lench

Vladimir Lench

Faculty of computer science and technology (CST)

Department of computer engineering (CE)

Speciality Computer systems and networks

Development of the method emulation of peripherals for a virtual FPGA-laboratory

Scientific adviser: Candidate of Engineering Sciences, Docent Yuri Zinchenko

Abstract

Content
Introduction

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence field-programmable. The FPGA configuration is generally specified using a hardware description language (HDL) [1] [14] [15] [16] [17].

FPGA is an important subject for studying in the field of computer engineering. But the cost of the equipment creates a large obstacle for receiving practical experience by students. Financing universities also doesn't allow to get enough debugging board that students could carry out individually the projects on a practical training. The way out of this situation is the creation of a virtual laboratory with access to it via the Internet. This will allow students to debug their designs, regardless of their location and easily get practical experience in the design of FPGA devices.

1. Goals and objectives

The overall objective of master's work is to create a virtual FPGA [18] [19] laboratory with remote access via the Internet. Remote access involves downloading firmware design in the FPGA chip, organization of management of the input devices debugging board, visualization output results, organization distributed access to the board [20] [21].

The firmware that is loaded into the board, is a project developed in VHDL or Verilog, generated in to bit file using the development environment (for example, ISE Design Studio). Download the firmware will take place in the following sequence:

  1. The user loads the bit file into his working directory.
  2. Initiate start the firmware downloading in the board.
  3. The file is downloaded to the board through the JTAG interface.

Visualization of the output data is planned with the help of video cameras, broadcast in real-time changes in the state of the debug stand. Also, the output data will be available via the serial port connected to the server.

The main objective of the project and the master's work as a whole is to provide users testing peripheral devices connected to the board. Since physical access to the peripheral equipment via the Internet will not be possible for user, it is necessary to develop a method of emulation equipment so that project for the emulated hardware has minimally difference between project for real device. First of all, it is planned to develop simulators for the computer mouse and keyboard connected on the PS/2 protocol.

Also, if remote access to FPGA [22] [23] board organization needs to take into account the distributed access, which is access rights to debug stand and queuing work with him. This is necessary because you can download in the board only one project. Therefore it is necessary to organize two types of access: global and local. Global access type is set by the administrator, and local access is a queue to the board. This necessary because only one user can has access to the board in one session. Once the user exits the board, he frees it, or the system automatically releases the board on long inactivity, and then the next user can start a new session [24] [25].

2. Relevance and motivation

Now access to the Internet may be obtained virtually anywhere from the world, therefore the creation of a virtual laboratory is an actual problem. Organization of access to the lab through the website due to the fact that browsers work the same on all operating systems for desktop computers and mobile devices.

Search report on the theme of master's work has shown that quantity projects for the creation of virtual laboratories with access to the FPGA boards is small, and those that include the emulation of peripherals even less. Examples of research papers on the development of virtual laboratories FPGA can be found here [2] [3] [4] [5] and [6].

3. Planned practical results

Remote control board system is structurally divided into three parts: the client part (web-site), server side and debugging the FPGA-complex (Figure 1).

Block diagram of a remote FPGA lab
Figure 1 - Block diagram of a remote FPGA lab

The Web site must consist of a login page, registration page and personal account. Each user can have access rights:

Once registered, a user is assigned to the right of guest access, the administrator can set in your account it necessary rights. Structurally personal user account is presented on Figure 2.

Structure of the personal site account
Figure 2 – Structure of the personal site account

On the right side there is a file manager that is the user's personal directory. With it you can upload files, create directories, delete files and folders, and upload the firmware into the board. There is management console in a central part of the picture, it will serve primarily for logging and debugging information output from the stand. From the left side videoplayer with broadcast video of stand debug will be shown. In the lower part there is a control panel with auxiliary settings of control remote laboratory.

The server part is a link between the stand and the user. The server must locate installed Web Server (IIS) for the transmission information to the user, a database (MySQL) and server-side programming language (PHP), HTML-code generating and processing data, communicate with user. Software to work with the debug stand also should be installed (Xilinx ISE Design Studio) and software organizes live video (VLC). To download the firmware, using the JTAG interface, as well as for sending and receiving, it is recommended to use a serial port (COM-port).

The server processes a user registration data, checks permissions, organizes access to the board, reception and transmission of data from the user to the board and vice versa. Also there is video streaming to the client from the server.

Stand uses FPGA board of the company Xilinx – Spartan 3E Starter Kit for debugging (Figure 3).

The board Spartan 3E Starter Kit
Figure 3 – The board Spartan 3E Starter Kit [7]
4. Development method of peripherals emulation

Debug stand uses Microblaze microprocessor core for testing peripheral devices. Microblaze – soft-core processor, developed by Xilinx for use in FPGA. Microblaze is implemented using standard logic and FPGA memory blocks [8].

MicroBlaze has a universal links with the periphery, providing the possibility of its widespread use in embedded systems. Basic I/O bus – CoreConnect PLB – bus can operate in master and slave modes. Most of the units are connected directly to the PLB. To access the FPGA internal memory (BRAM), MicroBlaze uses special bus LMB, which reduces the load on other buses [9] [26] [27].

PLB – Processor Local Bus is really usefull for this task. This 128-bit bus for connecting an arbitrary number of peripheral devices. It consists of a bus control module, timer, reading and writing software, modules addressing unit and additional DCL (Device Control Register) slave interface for access to the register of errors [10] [28] [29].

4.1. Keyboard and mouse PS/2

Before emulate peripheral equipment, principles of PS/2 interface should be learned. PS/2 – bidirectional interface, organizing data exchange between two devices. In this interface, the main lines are the Data and CLK. Each packet has a length of 11 bits:

  1. 1 start bit – is always 0;
  2. 8 data bits;
  3. 1 parity bit;
  4. 1 stop bit – is always 1.

The keyboard transmits keys scan-codes through the serial-port and the mouse sends 3 or 4-byte data containing the state of the pressed buttons and mouse movement. The fourth byte can be uesd for wheel scrolling, but it is necessary to specially initialize the mouse.

The host device can send commands to the keyboard and mouse controller. Mouse and keyboard respone byte 0xFA after recieving any of this command. The basic commands common to mouse and keyboard are:

  1. 0xFF – reset;
  2. 0xFE – resend, of the keyboard and mouse resend last byte.

On device initialization devices transmit 0xAA byte, and then keyboard can immediately send the keys scan-codes, and the mouse should send the next byte 0x00 – this is mouse ID without wheels. To initialize the mouse wheel is necessary to conduct additional initialization details which can be found in the official documents [11] [12] [13].

See mouse data packet structure on Figure 4.

Structure of mouse data packet
Figure 4 – Structure of mouse data package

The first byte has the following structure:

  1. 1st bit – the left mouse button;
  2. 2nd bit – right mouse button;
  3. 3rd bit – reserved for the middle mouse button;
  4. 4th bit – always 1;
  5. 5th bit – sign of the shift in the X axis;
  6. 6th bit – a sign of the displacement along the Y axis;
  7. 7th bit – overflow displacement axis X;
  8. 8th bit – overflow offset axis Y.

The second byte – is the offset along the X axis, and the third byte – displacement axis Y. The offset is calculated from left to right along the X axis and Y upwards. Moreover, if the mouse moves to the right and down, the offset is negative, in case of left and up movement offset is positive. Offset values are in the range -255 – 255. The sign offset stored in the first byte, and if this value is exceeded, the overflow bit is set [11].

4.2. Structure of the emulator PS/2 interface

Keyboard and mouse emulator will use all parts of the project: the client side, server side and board side. Figure 5 shows the mechanism of the emulator PS/2 interface. On the client side JavaScript handles keyboard and mouse events that will generate the necessary code packets and send them to the server. Before sending the data it is necessary to run the device initialization. After that event handlers from the keyboard will check the code of the pressed keys, select the desired code from the scan-code table, add additional code in the case of extended keys, as well as complement releasing key by a special break-code (0xF0). Encapsulation keyboard code algorithm is shown on Figure 6. The generated data will be sent to the server using ajax-requests. To avoid exceeding the number of requests, and that the client is not stuck, you need to send a fixed amount of data, wait for a response from the server, and then send the next set of data. In order to know the state of the board, an additional asynchronous request that will be repeated with a certain time interval.

Structure of emulator PS/2
Figure 5 – Structure of emulator PS/2 (Animation: – volume 99.2 Kbyte, frames quantity – 11, size – 750õ549, cycles – 3)
Encapsulation keyboard codes
Figure 6 – Encapsulation keyboard codes

Mouse on the client side works in a similar way. Also initializer of mouse generates necessary codes. Handlers of mouse motion events, press and release button form data packets and as well as a keyboard and sends data to the server. Forming data packets from the mouse is shown on Figure 7.

Formation of the mouse data packets
Figure 7 – Formation of the mouse data packets

The server receives the data from the client, buffers them and sequentially transmits via COM-port to the board. If the board sends a command to the device, then this command is intercepted by server application and server sends the appropriate response.

Data transmitted via COM-port, received by board and transmitted to the emulator PS/2 protocol, developed in the VHDL language. The purpose of the emulator is to receive data from RS232 serial interface, to convert these data into the PS/2 form and to pass PLB bus packet bypassing physical interface. The data received from the PLB bus must also be converted into RS232 interface form and passed to server.

Conclusion

At the time of creation of this page, the Master's work is not complete. Nowadays, it can be highlighted that current vector of master's work and methods of project developing are correct. Developing of described modules peripheral equipment emulation is planned in the future [30] [31] [32].

References
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