ABSTRACT ON THE THEME OF MASTER'S WORK "Research of the compositional microprograming control device in basis with lowered energy consumption"

1. INTRODUCTION
2. 1. THEME URGENCY
3. 2. GOAL AND TASKS OF THE RESEARCH
4. 3. USING SOPHISTICATED FUNCTIONAL BLOCK
5. CONCLUSION
6. REFERENCES

INTRODUCTION

The rapid development of digital devices has recently led to increased requirements for their performance and functionality. The developers faced the task of energy efficiency solutions used. The complexity of modern applications and the use of sub-micron technologies necessitate systems to reduce energy consumption through the use of optimal solutions in the design process.

One of the main objectives in the design of modern integrated circuits is to reduce power dissipation. Also, reduced power consumption to simplify wiring on the chip supply rails, reduces noise on the supply lines, electromigration and the manifestation of the effect of electromagnetic radiation.

1. THEME URGENCY

Throughout its existence, the active semiconductor devices have not changed. Probably their only significant change was the reducing the minimum feature size in accordance with Moore's Law.

But over time, there was a question that further scaling and other ways to improve the performance of silicon transistors can lead to reaching the physical limits of structures created. Energy problem is relevant in the design of microprocessors. This is due to a decrease in design rules, increasing the operating frequency and an increase in density of the elements on the chip due to the complexity of the circuit engineering component.

Since the problem of existing methods will reach its limit, there is a problem in the development of new approaches to reduce energy consumption microprogram control.

2. GOAL AND TASKS OF THE RESEARCH

Aim is to study different methods of reducing power consumption in control schemes and the development of new approaches.

The main objectives of the study:

1. 1.Research structures of various control devices;
2. 2.Research of hardware and software methods of influence on their parameters;
3. 3.Development new approaches to reduce energy consumption patterns;
4. 4.Testing different methods in simulation programs.

Object of study: control device firmware.

Subject of research: how to reduce power consumption by various methods in microprogram control unit with its implementation in FPGA basis.

3. USING SOPHISTICATED FUNCTIONAL BLOCK

Development of comprehensive measures to reduce energy consumption of modern digital VLSI circuits (VLSI), while maintaining the other functional parameters, is one of the urgent tasks of development of design methodology of electronic components (ECB). This problem is even more acute due to the active introduction of nanoscale VLSI type "System on Chip" (SoC English. System on chip) design methodology and development with reuse complex functional (SF) units. Significant factor limiting the performance of such devices, it becomes energy.

Nanoscale VLSI SoC type contain processor cores, memory, and a large number of peripheral digital, digital-to-analog and analog blocks. Depending on the functional SoC, more than 70 % of energy consumption accounted for digital IP blocks such as operational access memories (RAMs), arithmetic logic unit (ALU — including multipliers, adders, dividers, etc.), power management logic, and another synchronization unit [6]. Therefore, one of the most important problems to be solved in the design of SoC is to reduce the power consumption of digital IP blocks.

At the moment, the general tendency to reduce energy consumption is to develop technologies to reduce the supply voltage circuits and leakage currents of active and parasitic elements through the use of technologies with multiple threshold voltages, varying the thickness of the gate oxide transistors, the use of multiple sources of supply voltage and active power consumption controls. Leakage current may also be lowered by increasing the threshold voltage of the transistor to which the speed does not meet high demands. But this will require a significant change in the process of system design, and probably go to the development of a fully customized devices.

Reducing energy VLSI SoC within one technological base-complex hierarchical problem solved at all levels of the route of VLSI design. At the system level, create, adapt and examines key algorithms for VLSI SoC, developed and verified algorithmic model system. At the architectural level is determined by the basic structure of the SoC, developed specifications for its entire design and its constituent IP blocks. Functional level includes the steps of route design IP blocks, based on the use of modern CAD tools.

Depending on the design, methods of reducing energy consumption divided into algorithmic (system and architectural levels), schematics and topological (functional level). Development of IP blocks being at the functional level by the specifications, worked out at the system and architectural levels.

CONCLUSION

Continuous development of the functionality of portable technology leads to an increase in energy consumption. To solve this problem there are many ways, such as the discovery of new types of power sources or improving old, energy saving through the use of intelligent power management chip, a change of the elements on the chip and so on.

You can also note that basically solved the problem of energy efficiency devices containing processor, whereas solutions to a similar problem for control devices are not considered. Option for reducing the energy consumption of such schemes on the basis of baseline with reduced energy consumption will be considered in qualifying work degree.

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