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Abstract


about the theme:
"The development of methods synthesis of microprogram automatic devices Mealy with coding objects"

by Kostyanok Tat'yana
e-mail: le_chaton@list.ru

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Contents


Introduction
The purposes and tasks
Scientific novelty and practical value
Existing researches
Current and planned results on a theme
Summary
Literature

Introduction


The principle of microprogram management has been offered in 1951 of M. Yilks and assumes presence in any digital system of the device of management (УУ) which coordinates all blocks of system. The executive part of system which carries out data processing, refers to as the operational automatic device (ОА), and the digital system as a whole refers to as the operational device.The algorithm of work of system is set by one of formal methods, in practice of engineering designing language of columns-schemes of algorithms is most widely used.

The purposes and tasks


The purpose of the given research work is improvement and development of new methods of synthesis microprogrammable automatic devices of Meale. The choice of this problem has been caused by that all modern methods of synthesis are not optimized, and completions are necessary by development of digital automatic devices. That is, by development of more complex schemes of automatic devices of Meale, there is no universal remedy of the description of synthesis by complex structure. In any case it will be necessary to do many tests and checks.In any case it will be necessary to do many tests and checks. In the research work I shall try to optimize existing methods, to create any more perfect and to write the program which will do necessary calculations on entered data.

Scientific novelty and practical value


It is planned to develop the software which would provide synthesis and development of circuits of managing directors and finite state automations, using existing high technologies, such as UML, HDL, FPGA and Java. Practical value of a product consists in methods of the approach to the designing, linked with new optimization techniques of structure of the automatic device, and also availability of a program code of a product and possibility of its modification.

Existing researches


Presence of editors FSM testifies to a urgency of a theme of finite state automations (finite state machine) in such products as AHDL and Riviera. The Most widespread among description languages of the equipment are languages VHDL and Verilog. However direct implementation of controlling automatic devices in these languages is labour-intensive process. Therefore the special tools have been included in structure of many foreign CAD, allowing to simplify development of controlling automatic devices. So FSM unit is included in structure of CAD Active-HDL of Aldec corporation. This unit possesses a multifunctional graphic interface, for the description of controlling automatic devices. However FSM unit possesses number of disadvantages. In particular, the form of record of the controlling automatic device demands knowledge of language HDL. Systems of designing of controlling automatic devices and in other CAD are In a similar way organized.
Also FSM models at code generation do not consider hardware expenses at generation result code as it will be necessary that it is made by resources of synthesis, but the generated code does not consider many features of implementation of structure of the automatic device, therefore resources of synthesis often produce not the most optimal configuration result devices.
Comparative results of parameters of the synthesized devices at the identical initial columns-schemes, realized by resources FSM A-HDL (finite state machine) and by means of the structural description result circuits, show the certain decrease of number of used units FPGA at implementation by the second way.
Results of synthesis (for COTTON VELVET Lattice ispGDX2 Part LX256V):

Table 1 – Result of synthesis in FSM editor

Table 2 – Result of synthesis by a trivial method

DFF

IBUF

OBUF

AND2

INV

8 uses

2 uses

3 uses

16 uses

12 uses

DFF

IBUF

OBUF

AND2

INV

6 uses

2 uses

3 uses

12 uses

11 uses


Disadvantage of FSM-editor A-HDL – generation of a program code in behavioural style that does impossible to predict result of synthesis. The structural description of the circuit received as a result of trivial implementation, enables predictions of results even before synthesis – at a stage of generation of a program code that enables to generate a code for a chip or numbers of valves FPGA of the set dimension. [4]
As to UML editors for finite state automations one of such developments is executed graphics language on the basis of SWITCH-technologies and UML-notations – UniMod which describes behaviour of the object by means of graphs of transitions of structural automatic devices with the notation, and columns of transitions are under construction by means of the notation of the diagram of states UML.
Package UniMod provides development and execution of the automaton-oriented programs. It allows to create and edit UML-diagrams of classes and states which correspond to the circuit of links and the graph of transitions, and supports two types of implementation — on the basis of interpretation and compilation. In the first case there is a possibility:
To transform diagrams to format XML;
To execute the received XML-description by means of the interpreter created on the basis of a set of developed base classes. These classes realize, for example, such functions as event processing, saving of a current state, recording.
In the second case of the diagram it will directly be transformed to a code in the target programming language which subsequently is compiled and started.
Designing of programs with usage of package UniMod assumes the following approach: the logic of the application is described by the structural finite state automation set in the form of a set specified above diagrams, constructed with usage of the UML-notation. Sources of events and objects of handle are set by a code in the target programming language. [1].
One of UML the editors allowing partially to realize a task in view, is Poseidon. It is convenient the interface and generates comprehensible result code, but its disadvantage that data program product has the paid license and the closed program code that does impossible its modification in a necessary direction.
To one more UML the editor is UMLet constructed a development team on the basis of platform Eclipse, development covers all UML, that is rather inconvenient for the given discussed theme.

Current and planned results on a theme


Necessity of program implementation of methods of generation of a structural code of columns-automatic devices and application of optimization of this code follows from the analysis of existing problems and requirements.
The software product should possess the set forth above advantages (generation of a structural code under the set graph, count of demanded square of a chip, etc.).
During the analysis of optimization techniques and the constant extension of their number there are certain requirements to implementation of software product, the certain structure is formed.
The developed system should consist of following parts:
The graphics editor who realizes possibility of graphics mapping, editings and creations demanded graph-scheme (FSM).
The compiler which enables a textual set of the graph and coercion of textual representation in internal language of the program (XML, XMI, etc.).
The generator of a code with various optimizers, which will transform an internal code of the graph in concrete (Moore or Mile) implementation of the automatic device. [4]
After implementation of software product will be carried out researches concerning efficiency of the generated code for various existing FPGA chips, schedules of dependences, and also results of integration of the program with various existing resources of synthesis will be constructed.

Summary


Result of operation will be the software with an open code and realizing code generation in language HDL. The program code will be generated in view of existing algorithms of optimization of controlling automatic devices and EPLD(FPGA) is specified under concrete. Input parameters will be a UML circuit of implementation of the controlling automatic device.

At a writing of the given author's abstract master's work is not completed yet. Final end: January, 2007. The full text of work and all materials on a theme can be received at the author or its head after the specified date.

Literature


  1. А. А. Баркалов "Синтез устройств управления на программируемых логических устройствах" — Донецк: ДонНТУ, 2002
  2. Соловьев В.В. Проектирование функциональных узлов цифровых систем на программируемых логических устройствах. — Минск: Бестпринт, 1996
  3. Гуров В.С., Мазин М.А., Нарвский А.С., Шалыто А.А. UniMod: метод и средство разработки реактивных объектно-ориентированных программ с явным выделением состояний//МЕТОДЫ И СРЕДСТВА ОБРАБОТКИ ИНФОРМАЦИИ. – Московский государственный университет им. М.В. Ломоносова, М. – 2005. – С 361-366.
  4. Ю.Г. Карпов Теория автоматов. – С-Пб., Питер, 2002. – 206 с.
  5. Е.А. Суворова, Ю.Е. Шейнин Проектирование цифровых систем на VHDL. – С-Пб., БХВ-Петербург, 2003. – 560 с.